This invention relates to a low dielectric constant (k) layers.
As is well known in the semi-conductor art as the geometry shrinks, there is a need to reduce the dielectric constant of the inter-metal dielectric layers, in particular, and also in the layers used for shallow trench isolation. U.S. Pat. Nos. 6,171,945 and 6,054,206 each describe methods of reducing the effective dielectric constant of a deposited layer below that of the material from which it is formed. In each case voids are created within the material by the removal of atomic or molecular material. However such materials are difficult to use with, for example, chemical mechanical polishing because they have a low mechanical strength at their surface and may simply break up under the polishing process and further their surface porosity is a problem because chemical mechanical polishing, and indeed other cleaning processes, are wet. The porosity also provides a rough surface. Proposals have been made to overcome these problems by capping the layer, but such capping layers may de-laminate under the force of chemical mechanical polishing and because of their increased density, they may negate much of the reduction in k value achieved by creating a porous structure. Embodiments of the applicant's invention, mitigate at least a number of these problems.